## Description

## Design a sequential circuit that has a one bit input A and a one bit output Y.

### Question

Design a sequential circuit that has a one bit input A and a one bit output Y. The circuit produces Y=1 when the previous two values ofA are 00 or 11. Otherwise, Y=0. {a} Implement the design using a Moore-type Finite State Machine IZFSM]: i. Draw the state transition diagram for the sequential circuit above ii. Generate the state transition table for the sequential circuit above iii. Implement the design in Verilog iv. Write a testbench to test the design against the following input sequences — 1101000111, 1010101010. The rightmost bit of the input sequence is presented to the circuit ﬁrst. followed by the bits to its left. {b} Implement the design using a Mealy-type FSM and repeat the stepsti – iv}.

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